Revolutionize Integrated Circuit Design with Aniah
Aniah is a France-based startup aiming to deliver transistor-level verification for analog SoCs, proven to 1.6nm, developing verification tools that are faster, more accurate, and more reliable. As one of the winners of the IC Taiwan Grand Challenge Batch 4 in the AI Core Technologies and Chips category, Aniah addresses transistor-level verification for advanced analog and mixed-signal SoCs.
Overcoming ERC Challenges
Chip manufacturing is a vital industry for the modern world, especially as AI-driven expansion continues. However, the industry currently faces a number of setbacks which potentially delay projects or increase manufacturing costs due to the need for re-spinning or delayed verification. First-silicon success has dropped significantly, with a recorded rate of 14% in 2024 compared to 32% in 2020. Approximately 75% of global chip-related projects ship behind schedule, while up to 70% chip-project efforts are spent on verification and 41% re-spins are done due to physical bugs. Analog ERC (Electrical Rule Checking) faces 6 main challenges, including: conditional HiZ (high impedance), electrical overstress, missing LS/ isolation, scale & capacity issues, false-positive flood, and sign-off productivity issues. Every new chiplet, every new PHY, and every new power domain will multiply all six challenges. Aniah's core technology combines a fast, vector-less transistor-level verification engine with an LLM-based design intelligence layer.
Introducing IC Taiwan Grand Challenge
To strengthen Taiwan's position as a global semiconductor powerhouse, the National Science and Technology Council (NSTC) organizes the IC Taiwan Grand Challenge. Started in 2024, the competition originally focused purely on innovative IC designs and advanced application solutions. Today, ICTGC also honors teams in the fields of AI Core Technologies and Chips, Smart Mobility, Smart Manufacturing, Smart Medtech, and Sustainability, which can support and contribute to the semiconductor industry and Taiwan's industry in general. Aniah was selected as one of the winners of ICTGC Batch 4 with their Aniah OneCheck and Amigo AI combination in the AI Core Technologies and Chips category.
Delivering Transistor-level Verification for Analog SoCs
Aniah was founded in 2019, revolutionizing integrated circuit design by developing verification tools that are faster, more accurate, and more reliable. Aniah aims to increase productivity of analog design review by 400%, saving 80% design review time, and achieving 100% design quality with no silicon re-spin for the rule-based design check/ Electrical Rule Check (ERC). Their project combines 2 core functions: an explanation engine and an auto-waiver engine. The explanation engine interprets ERC rule definitions, maps violations to the schematic context, and provides detailed explanations. At the same time, the auto-waiver engine categorizes these violations based on its training from over 20,000 datasets labeled by analog/ mixed-signal designers. This process achieves a ≥ 80% classification accuracy across four ERC checks, alongside a ≥ 80% explanation accuracy validated by expert review. Their technology also features agent-to-SPICE flow that automatically generates simulation testbenches for "On-Hold" violations, which are context-dependent cases that need human confirmation, eliminating a major manual verification bottleneck.