Bridging Silicon Physics and AI with Leafy Lab
Leafy Lab is a US-based startup focusing on applied AI platforms, transforming analog and mixed-signal chip design. As one of the winners of the IC Taiwan Grand Challenge Batch 4 in the AI Core Technologies and Chips category, Leafy Lab's intelligence architecture combines design experience, physical data AI models, and software scalability, empowering chip designers to optimize performance, reducing time-to-market by up to 50%, and achieving first-pass silicon success.
Analog Design Bottleneck Delays Semiconductor Developments
As a vital component for modern life, semiconductors still rely on analog circuits which serve as the irreplaceable bridge linking the physical and digital worlds. Due to the lack of automated synthesis, analog design consumes disproportionate engineering time, forcing manual navigation of massive nonlinear parameter spaces. The main pain points of this specific segment can be summarized with 3 points: disproportionate effort, complex/ non-standardized design, and extreme PVT sensitivity. Analog components generally occupy a minimal chip footprint but consume a significant engineering time compared to digital, forcing manufacturers to spend a disproportionate effort on it. Analog designs also lack uniform optical frameworks. This complex/ non-standardized design means engineers will have to manually tune a massive landscape of topologies to meet application-specific requirements. In addition, analog design processes are highly sensitive to noise and Process-Voltage-Temperature (PVT) variations, forcing extensive, iterative, and costly validation cycles.
Leafy Lab solves this analog bottleneck by bridging silicon physics with predictive AI, turning a month long guesswork into day long precision workflows while cutting time to market. Leafy Lab delivers AI through a user-friendly intuitive software frontend that seamlessly accepts direct design and engineering inputs. Acting as both an automated designer and a strict rule judge, Leafy Lab uses predictive intelligence to autonomously optimize Power Performance and Area (PPA).
Introducing IC Taiwan Grand Challenge
To strengthen Taiwan's position as a global semiconductor powerhouse, the National Science and Technology Council (NSTC) organizes the IC Taiwan Grand Challenge. Started in 2024, the competition originally focused purely on innovative IC designs and advanced application solutions. Today, ICTGC also honors teams in the fields of AI Core Technologies and Chips, Smart Mobility, Smart Manufacturing, Smart Medtech, and Sustainability, which can support and contribute to the semiconductor industry and Taiwan’s industry in general. Leafy Lab was selected as one of the winners of ICTGC Batch 4 with their applied AI platform with explainable models to optimize chip designs.
Solving the Data Bottleneck with Leafy Lab
Leafy Lab was founded in 2024 aiming to close the semiconductor design-to-fabrication gap with an agentic AI platform. Leafy Lab’s core innovation focuses on using explainable AI and automation to accelerate the optimization of various analog circuits to balance the Power Performance and Area. They have developed a market-ready agentic AI platform to replace slow guesswork with deterministic predictive intelligence wrapped in a user-friendly frontend.
Leafy Lab has also established physics-informed prediction models to directly address the bottlenecks caused by manual tuning of hundreds of variables to correlate the MOS devices’ electric responses. Intended for foundries and design houses, the prediction model can learn from sparse tapeout measurements, predicting MOS I–V and C–V curves within 2% testing errors, conducting efficient inverse design tasks to screen billions of candidate parameters and thus convert limited silicon data into data-driven decisions. Leafy Lab provides an agentic AI workflow to replace conventional GUI-based approaches that involves an automated layout engineer and a strict layout judge, which interact automatically without human intervention. Under AI guidance, Power Performance and Area can be optimized and balanced at speed beyond human intelligence.